`ifndef APB_INTERFACE_SV
`define APB_INTERFACE_SV


interface apb_interface(input bit PCLK, input bit PRESETn);

	`include "apb_defines.svh"

	logic [(`APB_MAX_ADDR_WIDTH) - 1:0] PADDR 	;
	logic																PSEL		;
	logic																PENABLE	;
	logic																PWRITE	;
	logic [(`APB_MAX_DATA_WIDTH) - 1:0] PRDATA 	;
	logic [(`APB_MAX_DATA_WIDTH) - 1:0] PWDATA 	;
	logic																PREADY	;
	logic																PSLVERR	;

	// extra interface signal
	logic [3:0]													PSTRB		;
	logic [2:0]													PPROT		;
	
	clocking cb_slv @(posedge PCLK);
		default input #1ns output #1ns;

		input  PRESETn, PADDR, PSEL, PENABLE, PWRITE, PWDATA, PSTRB, PPROT;
		output PRDATA, PREADY, PSLVERR;
	endclocking : cb_slv

	clocking cb_mon @(posedge PCLK);
		default input #1ns output #1ns;

		input  PRESETn, PADDR, PSEL, PENABLE, PWRITE, PWDATA, PSTRB, PPROT;
		input  PRDATA, PREADY, PSLVERR;
	endclocking : cb_mon

endinterface : apb_interface


`endif // APB_INTERFACE_SV
